WJEC AS Electronics B490QS · C1.9(c)
Timing diagrams for sequential logic
- Code
- C1.9(c)
- In
- C1.9 Sequential Logic Systems
- Topic
- C1 Component 1: Principles of Electronics
- Course
- AS Electronics B490QS
- Board
- WJEC
Codes and titles are read by a script from WJEC's published specification and have not been checked by a person. What each point covers is in the specification itself: WJEC’s specification.
Points in C1.9 Sequential Logic Systems
- C1.9(a) SR latch from NAND gates
- C1.9(b) Propagation delays in sequential systems
- C1.9(c) Timing diagrams for sequential logic
- C1.9(d) D-type flip-flops: inputs, outputs and uses
- C1.9(e) Sequencing with a 4-bit counter and combinational logic
- C1.9(f) Two-digit decimal counting systems
- C1.9(g) Binary, decimal, hexadecimal and BCD conversions